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Week 09 Notes for CST8214
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- Ian! D. Allen - idallen@idallen.ca - www.idallen.com

Lab answers will be posted after the due date.  Not all questions will
be marked.  Check all your answers against the posted set.

Class Notes http://teaching.idallen.com/cst8214/07f/
  bit_operations.txt     Bitwise Operations, bit masking - AND, OR, NOT
  test2topics.txt     Test 2 (Nov 9) Review Topics and Questions
  text_errata.txt     Errors in The Essentials of Computer Organization and Architecture

- the range of IEEE754 single-precision floating-point is approximately:
  -2**127 to +2**127  -or-  -10**38  to +10**38  (approximately)
  see http://steve.hollasch.net/cgindex/coding/ieeefloat.html

- floating-point underflow happens for IEEE754 single-precision floating-point
  values closer to zero than  2**(-127) which is approximately  10**(-38)
  [actually about 5.9 x 10**(-39), but 10**(-38) is easier to remember]

- how can you tell if 0x5A5A is ASCII or a number?  (Answer: you can't)

- review Class Notes file bit_operations.txt
  - bitwise AND, bitwise OR, biwise NOT
  - word length affects bitwise NOT
  - C language expressions, e.g. char x = ~0x7;

- calculate number of address lines needed to address memory
  - use the exponent from the power of two, e.g. 2**24 cells need 24 lines
  - the MAR holds the memory address; the MBR holds the data value

- seven MARIE registers (slides 21-23):
  AC, MAR, MBR, PC, IR, InREG, OutREG

- Instruction Set Architecture: different for each brand of CPU
  - MARIE only has room for 4-bits, 2**4 opcodes, real chips have hundreds
  - we start with nine opcodes 1-9 and explain the others later
  - slides 26-29

- Register Transfer Notation/Language (RTN or RTL)
  - slides 30-32
  - gives the data path of data in the computer (Slide 23), e.g.

  LOAD X has this RTN:
     1) MAR <-- X
     2) MBR <-- M[MAR]
     3) AC  <-- MBR

  SKIPCOND has this complex RTN:
  if COND = 00 then
      if AC < 0 then PC <-- PC + 1
   else if COND = 01 then
      if AC == 0 then PC <-- PC + 1
   else if COND = 11 then
      if AC > 0 then PC <-- PC + 1

Instruction processing
  - don't think "fetch/decode/execute", think "fetch/increment/execute"
  - see file text_errata.txt in the Class Notes
  - the book is wrong in section 4.9.1 #4 and Figure 4.11
    (not all memory access *reads* the memory!)

  - a full RTN cycle for LOAD X becomes:
    FETCH:
      MAR <-- PC
      IR  <-- M[MAR]
    INCREMENT:
      PC  <-- PC + 1
    EXECUTE: (LOAD)
      MAR <-- X 
      MBR <-- M[MAR]
      AC  <-- MBR

  - a full cycle for JUMP X becomes:
    FETCH:
      MAR <-- PC
      IR  <-- M[MAR]
    INCREMENT:
      PC  <-- PC + 1
    EXECUTE: (JUMP)
      PC  <-- X
  - note the "useless" increment of the PC before the jump

- omit the section on interrupts (4.9.2)

Simple Program in binary and Assembly Mnemonics (slides 40-42)

Assemblers: Slides 43-46