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Week 11 Notes for CST8214
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- Ian! D. Allen - idallen@idallen.ca - www.idallen.com

Lab answers will be posted after the due date.  Not all questions will
be marked.  Check all your answers against the posted set.

Class Notes http://teaching.idallen.com/cst8214/07f/
  test2topics.txt     Test 2 (Nov 9) Review Topics and Questions
  text_errata.txt     Errors and updates for the course textbook

Review of Instruction Processing:
  - don't think "fetch/decode/execute", think "fetch/increment/execute"
  - see file text_errata.txt in the Class Notes
  - the book is wrong in section 4.9.1 #4 and Figure 4.11
    (not all memory access *reads* the memory!)

  - a full RTN cycle for LOAD X becomes:
    FETCH:
      MAR <-- PC
      IR  <-- M[MAR]
    INCREMENT:
      PC  <-- PC + 1
    EXECUTE: (LOAD)
      MAR <-- X 
      MBR <-- M[MAR]
      AC  <-- MBR

  - a full cycle for JUMP X becomes:
    FETCH:
      MAR <-- PC
      IR  <-- M[MAR]
    INCREMENT:
      PC  <-- PC + 1
    EXECUTE: (JUMP)
      PC  <-- X
  - note the "useless" increment of the PC before the jump

- "fetch" and "increment" are the same for *every* instruction cycle.
  - the only thing that differs is the "execute" phase

Review: Assemblers: Slides 43-46
 - symbol table: Slides 45-46

New Topics:
-----------

Indirect Addressing: Slides 47-48

(Omit material on JnS (subroutines))

Decoding: hardwired vs. microprogrammed - Slides 52,62,63-64,69

Real ISAs: Intel (CISC): Slides 70-75
Real ISAs: MIPS  (RISC): Slides 76-77

Review: Slides 78-79

Chapter 5
---------

Intro: Slides 1-6

Endian: Slides 6-9

Big:     0x00112233 stores with MSB (big end) in lowest memory
Little:  0x33221100 stores with LSB (little end) in lowest memory

- little-endian stores byte, short, word all at same address 0
- big-endian stores byte at 3, short at 2, and word at 0
- big-endian address points to the MSB (sign byte)
- character data is stored big-endian (leftmost byte [first byte] in a
  string goes into lowest memory)
- hex dumps show big-endian numbers in "natural" byte order
- Internet byte order is big-endian

http://en.wikipedia.org/wiki/Endianness
http://www.rdrop.com/~cary/html/endian_faq.html

ISAs: Stack/Accumulator/GPR:  Slides 10-13, 16-19
RPN (postfix): Slide 14-15

Types of instructions: Slide 23

Addressing: Slides 24-29

Pipelining (ILP): Slides 30-32,35-36

Real ISAs: Slides 37-40

Java bytecode: Slide 41-43

Review: Slides 44-46